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February 15, 2013
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News for and about the microelectronics industry

  Today's Tech Buzz 
  • MIT researchers find new way to passivate silicon
    Researchers at the Massachusetts Institute of Technology report they can passivate silicon at room temperature, a development that promises to lower costs in producing solar cells and other silicon-based semiconductor devices. The passivation process currently requires heating a silicon surface to 400 degrees C. (2/14) LinkedInFacebookTwitterEmail this Story
  ICs, Memory & More 
  • Analysis: Renesas cuts employees, GlobalFoundries may want them
    Renesas Electronics last year had nearly 7,500 employees take early retirement and the company is looking to cut another 3,000 jobs this year, Junko Yoshida notes, adding many of these older employees can find work in the semiconductor industry, if they are willing to leave Japan. GlobalFoundries is one prospective employer that is eager to get engineers and other types of workers who formerly worked for Renesas, Yoshida writes. EE Times (2/14) LinkedInFacebookTwitterEmail this Story
  • Other News
  Going Green 
  • Stanford, Singapore institute work together on energy efficiency
    The A*Star Institute of Microelectronics in Singapore and Stanford University today said they will collaborate on the development of nanoelectromechanical system switches -- a program meant to improve the energy efficiency of mobile devices and other electronics. They will work together on creating a NEMS fabrication process, resulting in a NEMS-based switch. ZDNet (2/15) LinkedInFacebookTwitterEmail this Story
  • Silicon nanowires improve battery performance in R&D at USC
    Researchers at the University of Southern California are using flexible, porous silicon nanowires to improve the energy efficiency and charging time of lithium-ion batteries, this blog post notes. The researchers see this technology being implemented in battery packs in 2015 or 2016. Engadget (2/13) LinkedInFacebookTwitterEmail this Story
  Semiconductors in Action 
  • Micron shrinks 128Gb NAND flash memory to 146-square mm
    Micron Technology has introduced a 128-gigabit NAND flash memory device that measures just 146 square millimeters, more than one-quarter smaller than its previous 128Gb NAND flash memories. The triple-level-cell memory is made with a 20-nanometer process. (2/14) LinkedInFacebookTwitterEmail this Story
  • Nvidia has tablet processors down; next, smartphone chips
    Nvidia's Tegra processors are designed into a number of tablet computers. Where the company is lagging behind Qualcomm is offering a chip for smartphones that integrates an applications processor and a modem -- a Long-Term Evolution modem, in particular. Nvidia CEO Jen-Hsun Huang said Wednesday, "Smartphones ... this is an area where we'll need to have an LTE modem to be successful. We'll have some phone success this year, but we don't expect to have a whole lot of phone design wins until we engage the market with LTE." GigaOm (2/14), The Verge (2/13) LinkedInFacebookTwitterEmail this Story
  Testing & Standards 
  • Toshiba licenses ASIC tech from BaySand, will ship chips in April
    Toshiba reported that it will start shipping structured array custom application-specific integrated circuits in April, using technology it has licensed from BaySand, a California startup. BaySand and Toshiba reached their ASIC licensing agreement in October, which included Toshiba making an equity investment in BaySand. EE Times (2/14) LinkedInFacebookTwitterEmail this Story
  • Other News
  JEDEC News 
  • Updates to JESD21-C: JEDEC Configurations for Solid State Memories now available for free download
    JESD21-C is a compilation of some 3000 of JEDEC memory device standards for solid state memory from September 1989 to the present. In addition to the free downloads available on the JEDEC website, an annual updating service and complete hard copies are also available for purchase. LinkedInFacebookTwitterEmail this Story
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--Albert Einstein,
German-born theoretical physicist

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