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December 14, 2012
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News for and about the microelectronics industry

  Today's Tech Buzz 
  • GlobalFoundries CEO: We will survive as an IC tech leader
    Silicon foundries are evolving in a changing semiconductor industry, and GlobalFoundries is emerging as one of the top IC manufacturers in the world, CEO Ajit Manocha said. "Only four players have capabilities to offer leading-edge technologies beyond 28 nanometer," he asserted, listing the others as Intel, Samsung Electronics and Taiwan Semiconductor Manufacturing. EE Times (12/13) LinkedInFacebookTwitterEmail this Story
  ICs, Memory & More 
  • New strategy will take time to implement, Freescale CEO says
    Freescale Semiconductor CEO Gregg Lowe said the product strategy he implemented this year will require a few years to take hold and succeed. "My thought process is, 2013, we're implementing the strategy; 2014, we'll start to see some benefits, maybe holding share at that point. And in 2015 we start regaining share," he told Reuters in this interview. Reuters (12/13) LinkedInFacebookTwitterEmail this Story
  • Foundries take different approaches to 3DIC manufacturing
    The leading silicon foundries are evolving in dealing with 2.5D and 3D chips, with some striking off on their own and some collaborating with other chipmakers, Mark LaPedus writes. The field is even attracting new entrants, as DRAM supplier Tezzaron Semiconductor is getting into the foundry business with its newly acquired wafer fab in Austin, Texas, he notes. SemiMD.com (12/13) LinkedInFacebookTwitterEmail this Story
  Semiconductors in Action 
  • Design plays key role in providing known good die
    The role of known good die is taking on greater importance in the era of stacking multiple chips in one package, this analysis notes. Design-for-test is emerging as a key consideration, making sure such die can be easily tested all through the manufacturing process, it was said. SemiMD.com (12/13) LinkedInFacebookTwitterEmail this Story
 
  • TI processor picked for Audi's new infotainment system
    The Jacinto 5 processor from Texas Instruments will be at the heart of Audi's next-generation MIB High infotainment system, which runs on the QNX real-time operating system, this blog post notes. The TI processor will displace Nvidia's Tegra processor in the Audi electronics. Ubergizmo.com (12/12) LinkedInFacebookTwitterEmail this Story
  • Qualcomm plans to zero in on chip design for high-end phones
    Qualcomm may use IC designs by ARM Holdings and others for the central processing units in the chipsets it supplies for entry-level smartphones and low-end handsets, but it will design the CPUs in quad-core processors going into chipsets for high-end smartphones, according to Qualcomm's James Shen. He said consumers are "more concerned about which brands are used in those electronics [products], and they are more concerned about the overall performance of the chipsets." The Taipei Times (Taiwan) (12/14) LinkedInFacebookTwitterEmail this Story
  • Other News
  Testing & Standards 
  • Smaller IC dimensions present challenges for DFM
    As the dimensions of advanced semiconductors shrink to 20 nanometer and below, the challenges in design-for-manufacturing technology are increasing, Ann Steffora Mutschler notes in this analysis. "What this boils down to is that semiconductor companies must hire additional skilled engineers, as well as purchase additional CAD tools," she writes. SemiMD.com (12/13) LinkedInFacebookTwitterEmail this Story
  • Imec, Synopsys collaborate on designing 10nm FinFETs
    Having already tackled 14-nanometer FinFETs, Imec and Synopsys have moved on to developing technology computer-aided design tools for 10nm FinFETs, this article says. "Our focus is to address semiconductor device and material challenges at 10 nanometers and beyond," said Aaron Thean of Imec. "Collaborating with Synopsys helps us maximize the impact and reach of our advanced research programs." Electronics Weekly (U.K.) (12/13) LinkedInFacebookTwitterEmail this Story
  JEDEC News 
  • Back by popular demand: JEDEC to hold DDR4 Workshop in February 2013
    Join us in Santa Clara, Calif., on Feb. 6 and 7 for an in-depth technical review of DDR4, as taught by industry experts involved in the creation of the standard. Participants will gain insight into DDR4's wide range of innovative features and device operation, as well as current and planned technological enablements to facilitate adoption of DDR4. See the agenda and register today -- space is very limited and early bird discounts end 12/21. LinkedInFacebookTwitterEmail this Story
  • EE Times takes a first look at JESD230 NAND Flash interface interoperability standard
    JEDEC and ONFI talk with EE Times Memory Designline editor Kristin Lewotsky in this informative Q-and-A about JESD230. The standard is available for free download from both www.jedec.org and www.onfi.org. LinkedInFacebookTwitterEmail this Story
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  SmartQuote 
The best preparation for tomorrow is to do today's work superbly well."
--William Osler,
Canadian physician


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