| News for and about the microelectronics industry |  |
- Chipmakers feel more optimistic about 2013, KPMG survey finds
Surveying more than 150 semiconductor executives, KPMG found they are generally more optimistic about business prospects for the year ahead than they were a year ago. The annual survey produced a positive score of 57 this year, compared with a negative score of 46 in late 2011. Three-quarters of those surveyed said revenue would be greater in 2013 and nearly as many said industry profitability would be up next year. The Wall Street Journal/Digits blog
(12/11)     
| ICs, Memory & More |  |  |
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- Layoffs coming for Micron employees in Israel?
In the new year, Micron Technology may conduct "extensive layoffs" among its 1,300 employees in Israel, Globes reports. The company's Israeli operations are derived from its acquisition of Numonyx, a flash memory manufacturer, nearly three years ago. Micron didn't comment on the report. Globes (Israel)
(12/11)
- Analysts see consumers as big winners of churning chipset market
Smartphone owners will benefit from the turmoil among the global mobile chipset vendors, say analysts who predict that the fallout will result in more advanced high-end smartphones and less costly budget handsets. "It will give the smartphone vendors better control of their products. That will allow for better integration between hardware and software, which will result in a better user experience," said Malik Saadi with Informa Telecoms & Media, a market research firm. Network World/IDG News Service
(12/10)
| Going Green | | |
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- SuVolta chips are said to use one-half less power
SuVolta has developed a technology called Deeply Depleted Channel that it touts as capable of reducing a chip's power usage by up to 50%, making such chips suitable for use in smartphones and tablet computers. Fujitsu Semiconductor is fabricating chips for the venture-funded startup, which expects to offer its devices for sale in the first half of next year. VentureBeat
(12/10)
- MIT crafts 22nm transistor made of indium gallium arsenide
Researchers at the Massachusetts Institute of Technology have developed a metal-oxide semiconductor field-effect transistor with 22-nanometer dimensions using indium gallium arsenide, a compound material that they say could prove to be a viable alternative to silicon. These MOSFETs would require less power than conventional MOSFETs made with silicon, they say. VentureBeat
(12/10)
| Semiconductors in Action | | |
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- Intel will turn out 22nm SoCs next year
Intel next year will produce system-on-a-chip devices made with a 22-nanometer process that will be 22% to 65% faster than their 32nm SoC predecessors. The company is expected to use the 22nm SoC process for its line of Atom processors, which go into smartphones and tablet computers. The Wall Street Journal
(12/10), Reuters
(12/10)
- Flexible biochips could be used in the human body
Thinly sliced silicon atop a flexible membrane can be used to produce ICs that can be applied to the skin or used inside the human body to diagnose and treat sickness, according to researchers at the University of Illinois at Urbana-Champaign. The UI researchers are also working on biochips made of silicon, magnesium and other minerals that can dissolve in water. Computerworld/IDG News Service
(12/10)
| Testing & Standards | | |
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- Imec CEO: 14nm chips will be more expensive to produce
Producing semiconductors with a 14-nanometer process will be at least 60% more expensive than 28nm chips, even when factoring in the use of extreme-ultraviolet lithography, according to Imec CEO Luc Van den hove. "It is likely some design rules at 14nm will have to be relaxed somewhat," he said in a keynote address Monday in San Francisco. EE Times
(12/11)
| JEDEC News | | |
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EE Times takes a first look at JESD230 NAND Flash interface interoperability standard
JEDEC and ONFI talk with EE Times Memory Designline editor Kristin Lewotsky in this informative Q-and-A about JESD230. The standard is available for free download from both www.jedec.org and www.onfi.org.
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Back by popular demand: JEDEC to hold DDR4 Workshop in February 2013
Join us in Santa Clara, Calif., on Feb. 6 and 7 for an in-depth technical review of DDR4, as taught by industry experts involved in the creation of the standard. Participants will gain insight into DDR4's wide range of innovative features and device operation, as well as current and planned technological enablements to facilitate adoption of DDR4. See the agenda and register today -- space is very limited and early bird discounts end 12/21.
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