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December 20, 2012
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News for and about the microelectronics industry

  Today's Tech Buzz 
  • Ceva won't outbid Imagination for MIPS assets
    Ceva said it will not submit a bid for the MIPS Technologies operating business higher than the $100 million offered by Imagination Technologies Group. The MIPS assets include 82 patents that aren't being sold to Allied Security Trust, which is paying $350 million to acquire 498 MIPS patents. XBitLabs.com (12/19) LinkedInFacebookTwitterEmail this Story
  ICs, Memory & More 
  • With the FTC in opposition, IDT calls off purchase of PLX
    Integrated Device Technology put an end to its plan to acquire competitor PLX Technology for $330 million following the Federal Trade Commission's complaint in opposition to the proposed merger. "Although we continue to believe in the benefits of the transaction, our management and board of directors have determined that it was in the best long-term interests of IDT and its stockholders not to pursue what would likely be a protracted, costly and unpredictable litigation process," IDT CEO Ted Tewksbury said in a statement. The Wall Street Journal/Dow Jones Newswires (12/19) LinkedInFacebookTwitterEmail this Story
  • Ericsson to write off $1.2B on ST-Ericsson JV
    Ericsson plans to take a noncash charge against earnings of $1.2 billion in this quarter to write off the value of its joint venture with STMicroelectronics to develop wireless communications chips. STMicroelectronics plans to leave the joint venture, and Ericsson is considering its options for ST-Ericsson, such as shuttering the operation. Bloomberg (12/20) LinkedInFacebookTwitterEmail this Story
  Going Green 
 
  • UMC tapes out energy-efficient small display driver chip
    United Microelectronics reported completing the tape-out of a customer's small display driver chip, made with a 55-nanometer process. The 55nm process balances chip size, performance and power consumption for the IC's use in smartphones with Full HD graphics capability, the foundry said. DigiTimes (12/19) LinkedInFacebookTwitterEmail this Story
Register now for JEDEC's DDR4 Workshop:
Early Bird Discounts end Friday

Register today to reserve your spot in Santa Clara, CA for a 2-day, in-depth technical review of the new DDR4 standard on 2/6 & 2/7, taught by industry experts involved in the creation of the standard. Space is very limited — see the agenda and REGISTER NOW for the DDR4 Workshop.
  Semiconductors in Action 
  • Can China produce a rival to the processor giants?
    China wants its semiconductor industry to produce products that could take the place of microprocessors designed by Advanced Micro Devices, ARM Holdings and Intel, Phil Muncaster notes in this analysis. Much is riding on the eight-core Godson-3B1500 processor that Loongson Technologies will describe at a conference in February, he writes. MIT Technology Review online (12/19) LinkedInFacebookTwitterEmail this Story
  Testing & Standards 
  • Compound semiconductor chip could work at terahertz levels
    Researchers at the Ferdinand-Braun-Institut and the IHP-Leibniz-Institut have come up with a way to put an indium-phosphide IC on top of a silicon-based chip made with a standard complementary metal-oxide semiconductor process. The resulting device could be capable of operating at terahertz speeds, they claim. ZDNet (12/19) LinkedInFacebookTwitterEmail this Story
  • Other News
  JEDEC News 
  • LAST CHANCE to save with early bird discounts: JEDEC DDR4 Workshop
    Register by 12/21 for best savings -- $50 off onsite rates -- for JEDEC's two-day DDR4 Workshop on Feb. 6 and 7 in Santa Clara, Calif. This event will offer an in-depth technical review of DDR4, as taught by industry experts involved in the creation of the standard. Participants will gain insight into DDR4's wide range of innovative features and device operation, as well as current and planned technological enablements to facilitate adoption of DDR4. See the agenda and register today -- space is very limited. LinkedInFacebookTwitterEmail this Story
  • Updates to JEP95: JEDEC Registered and Standard Outlines for Solid State and Related Products now available for free download
    JEP95 is a compilation of some 3000 pages of outline drawings for microelectronic packages. In addition to the free downloads available on the JEDEC website, an annual updating service and complete hard copies are available for purchase. Recent updates include: MO-269H, Registration - DDR3 SDRAM DIMM (Dual Inline Memory Module) Family with 1.00 mm Contact Centers and MO-274C, Registration - DDR1/DDR2/DDR3, 144 Pin, 16b/32b Small Outline Dual Inline Memory Module (SODIMM) Family, 0.8 mm Pitch. LinkedInFacebookTwitterEmail this Story
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  SmartQuote 
No man for any considerable period can wear one face to himself and another to the multitude, without finally getting bewildered as to which may be the true."
--Nathaniel Hawthorne,
American author


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