QuTech, a research group associated with Intel, reports it was able to develop a spin-based quantum computer with two quantum bits on a single microchip. Meanwhile, physicists at Princeton University say they paired photons to electron spins, an advance that may help in creating larger quantum computers.
Researchers are making progress in advancing machine learning and neuromorphic computing. "The most significant advances in machine learning in recent years have come from hardware improvements," writes Katherine Derbyshire.
MIT researchers have crafted a neural network processor that has an up to 95% overall power decrease. This advance will enable calculations for artificial intelligence and machine learning on a single system-on-a-chip device, rather than using cloud-based servers to perform the calculations.
ON Semiconductor brought out the AR0430 complementary metal-oxide-semiconductor digital sensor, which is said to provide 2D video imaging and 3D image recognition at the same time. FRAMOS, a distributor, offers the CMOS image sensor.
Diodes introduced the PT7M3808 line of microprocessor supervisory circuits, which is said to monitor system voltage from 0.4 volt to 5V. The PT7M3808 has an ultra-low quiescent current, usually around 2.8 amperes, and is available in SOT26 and DFN2020-6 packages.
Ellie Yieh of Applied Materials talks about a number of topics concerning next-generation semiconductor manufacturing in this interview. "New compute and memory architectures and system-level design schemes are creating different types of challenges, which impact processing and memory," she says.
Register now for early bird rates for the Memory System Tutorial on March 27 in Santa Clara, Calif., taught by seasoned industry veteran Desi Rhoden of Montage Technology. Covering every DRAM generation, this tutorial will also include System and Module implications for servers and other applications. Attendees will benefit from this tutorial by gaining an improved understanding of memory technology and standards, their history, current status and future trends.
Learn about a variety of market-specific memory modules in development in the industry and coordinated through JEDEC at this Tutorial on Memory Modules, Configurations & a New SPD Architecture Using MIPI I3C on March 28 in Santa Clara, Calif. Taught by industry experts Bill Gervasi (Nantero), Michael Joehren (NXP) and Sam Patel (IDT). See the full description and register today.
Because I cannot do everything, I will not refuse to do the something that I can do.